Exhibitor: Bosch Sensortec GmbH
Hall/Booth: 4A-512
The BMI560 is part of Bosch Sensortec’s new BMI5 motion sensing platform and represents the next generation of intelligent sensing for XR devices, robotics, and high-end mobile systems. It combines industry leading sensor performance with integrated edge AI, empowering devices not only to capture motion but also to interpret complete motion patterns directly at the sensor. The BMI560 has everything on board to master the essential step from “measuring” to “understanding”.
A newly developed hybrid analog front end within the custom ASIC, together with innovative MEMS structures, delivers extremely low noise, outstanding vibration robustness, and minimal latency—crucial for precise head and hand tracking or frame prediction in XR applications as well as accurate pose estimation in robotic systems.
The platform also offers extended full scale ranges and embedded on chip intelligence such as an edge AI classification engine, data fusion, and motionless self calibration. This allows devices to analyze movements, interactions, and contextual signals directly on the sensor without relying on power hungry external processing.
The result: maximum accuracy, reduced system latency, lower power consumption, and significantly simplified integration thanks to a compact LGA package with an industry-standard footprint and pinout, including pin-to-pin compatibility to predecessor products from Bosch Sensortec.
The BMI5 platform is modular and scalable, with additional specialized variants for XR, robotics, wearables, and hearables under continuous development. All products are halogen free and RoHS compliant, meeting the highest ecological standards—without compromising performance or functionality.
Exhibitor: Synaptics
Hall/Booth: 4A-259
The Synaptics Astra™ SL2610 solves a key challenge in modern IoT and embedded design: developers have long been forced to choose between underpowered MCUs or oversized application processors. The SL2610 introduces a “right sized,” AI native architecture that combines high compute performance, efficient on device AI, and low power consumption in a single SoC.
Powered by the Torq™ Edge AI platform—featuring the industry’s first production deployment of Google’s Coral NPU—the SL2610 efficiently executes CNN and transformer models. Its open IREE/MLIR toolchain eliminates vendor lock in and enables seamless development across PyTorch, ONNX, TensorFlow, and other major frameworks.
With Arm® A55 cores, a modern Mali™ GPU, and a dedicated system controller, the SL2610 supports fluid HMIs, vision analytics, voice interfaces, and secure inferencing for industrial grade applications—all while staying within strict energy and BOM constraints.
Its standout feature is pin compatible scalability across five device variants using a unified software stack. This allows manufacturers to scale performance and features without redesigning hardware or rewriting software.
By reducing component count, enabling efficient local processing, and lowering power demands, the SL2610 provides a sustainable and future proof foundation for next generation Edge AI products.
Exhibitor: ZF Friedrichshafen AG powered by SiliconAuto
Hall/Booth: 4-665
The new ZF I/O Interface Chip, paired with SiliconAuto’s Companion Controller, transforms the architecture of future automotive high performance computers. Instead of concentrating all sensor interfaces and preprocessing tasks on expensive performance SoCs—often leading to CPU overload and memory bottlenecks—the chip performs real time acquisition and preprocessing of camera and radar data directly on silicon. This frees valuable CPU resources, avoids memory contention, and ensures reliable scaling of multiple parallel sensor interfaces.
Its core innovation is a highly integrated I/O platform that incorporates all essential automotive interfaces (CSI 2, radar signal processing, Ethernet, and more) with deterministic streaming based processing. Coupled with SiliconAuto’s XMotiv M3 for fast boot, power sequencing, system supervision, and secure boot, the solution delivers immediate readiness and robust control. Through standardized high speed links such as PCIe or UCIe, the architecture remains fully SoC agnostic, giving OEMs maximum flexibility in selecting their compute platform.
The USP: the world’s first live demonstration of a specialized I/O chip with real time camera ISP and radar preprocessing integrated directly in hardware. Precise timestamping, deterministic synchronization, and an optimized DRAM/SRAM architecture reduce latency, cost, and power consumption—while ensuring “turn key” sensor availability right after ignition.
As a modular and scalable concept, the solution supports future chiplet based HPC designs, open standards, and sustainable upgrade paths without costly redesigns—paving the way for energy efficient, sovereign automotive computing in Europe.
