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26 - 28 February 2019 // Nuremberg, Germany

Conferences and supporting programme

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Session 10.2 I: SoC II EDA I

Matlab Simulink for FPGA-Design Vortragssprache Englisch

A new and updated logic for a FPGA design can be created model-based for good reasons to increase effectiveness. Synchronous data flow networks, which represent the calculation model behind Simulink models, can be implemented easily and naturally on FPGAs. Such a design can be directly downloaded and executed in a Java environment using code generated from a Simulink2Java tool. Another advantage is that the data flow networks generated from Simulink models can be reconstructed and analyzed in Java byte code thanks to their unique semantics and extensive metadata. As a result, a specialized code generator can transparently implement Simulink models embedded in a Java application automatically for hardware acceleration on FPGAs. A suitable framework offers a comfortable and secure environment based on the Java platform for controlling FPGAs and hybrid systems.

--- Date: 27.02.2019 Time: 12:00 PM - 12:30 PM Location: Conference Counter NCC Ost

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