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25 - 27 February 2020 // Nuremberg, Germany

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Exhibitors & Products embedded world 2020

RISCV_VM

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The OpenHW Group's RISC-V Virtual Machine (riscv_vm) is intended for anyone wanting to study, configure as-preferred, modify, implement or release hardware based the RISC-V Instruction Set Architecture. The VM is preconfigured for RISC-V HW development. It was developed and tested with VirtualBox 6.0.10 but not on other virtualization SW. As of Sept 10, 2019, it includes most of the SW described in the https://open-isa.org/get-started/ webpage, except for NXP's VEGA board SDK.

  • RISC-V SW tool chain using the Eclipse-IDE
  • RISC-V Imperas OVPSim model
  • RISC-V Verilator model
  • The files in the ~/bin directory are used to create the VM Linux image after Ubuntu 18.04LTS has been installed.
  • The VM'sminimal configuration is 2CPU/4G-RAM/20GB-DISK with USB 2.0 enabled
  • To donwload a protable *.osa appliance file, go to:
  • Note1: that the virtual machine userID /password is user/abc123
  • Note2: an early version of the VM was released with a work-around to comply with 3rd party SW components in the VEGA SDK; for that version, the SDK must must installed directly within the VM following the instructions located here
  • Note3: as of Monday September 16th, the VM includes all SW.

Importing VM into VirtualBox on Windows10 host

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