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2 - 4 March 2021 // Nuremberg, Germany

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Exhibitors & Products embedded world 2020
Zoom product LOGO_TICO-XS (JPEG XS) lightweight compression IP-cores (FPGA/ASIC)

TICO-XS (JPEG XS) lightweight compression IP-cores (FPGA/ASIC)

LOGO_TICO-XS (JPEG XS) lightweight compression IP-cores (FPGA/ASIC)

TICO-XS (JPEG XS) lightweight compression IP-cores (FPGA/ASIC)

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The disruptive lightweight compression is suitable to capture, transmit, store, and manage higher resolutions (8MP; 32MP, 100MP 360°, …) with cost-, power-, and memory-savings.

A full range of TICO-XS (ISO JPEG XS) IP-cores(FPGA/ASIC) offering the following benefits:

  • TICO-XS cores : ISO-JPEG-XS compliant
  • Full transparency to uncompressed down to visually lossless
    • From 4:1 down to 15:1 compression
    • 2MP 60fps at 600 Mbps – 125 Mbps
    • 8MP 60fps at 2,4 Gbps – 500 Mbps,
    • 32MP 60fps at 8 Gbps – 2 Gbps
  • Pixel line latency (microseconds, less than 1 millisecond)
  • 4:2:0, 4:2:2, 4:4:4
  • Up to 16 bits
  • Tiny in FPGA (Xilinx or Intel), no external memory
  • Low-power

Applications: industrial cameras, image systems, transmission, automotive (ADAS, logging systems, …), machine vision systems, medical applications, cable extenders, interfaces, …

TICO-XS (JPEG XS) lightweight compression IP-cores (FPGA/ASIC) is assigned to following product groups:

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