EKH extended it’s product portfolio. Beside the DRAM memory compliance measurements we are happy to provide our own solutions for connecting the signals for this measurement. As the DRAM specification defines the signal compliance at the ball of the DRAM package it is required to add an interposer below the DRAM to connect the scope probes directly at the ball of the DRAM package. With several innovative implementation ideas EyeKnowHow developed an interposer that allows usage in nearly all board configurations and layouts. This interposer will be available for DDR2, DDR3 and DDR4 devices. All configurations (x4, x8 and x16) as well as stacked devices are covered by the available product family. “In-Scope” simulation is a workaround to do compliance testing even if the signal cannot be measured at the ball, but only somewhere else, but this solution is expensive and not easy to use. In addition our interposer allows compliance testing even if there is no test point available at all because all signals are routed in the inner layers! In order to configure the DRAM interface on embedded boards correctly and verify the margins a compliance test should be done for each new design. This helps to avoid the situation that change of the DRAM supplier will cause the system to fail!
"Eye" KnowHow: The Gigabit Challenge!
As many interfaces are reaching gigabit data rates signal integrity is getting more and more critical. Various different parasitic effects are going to disturb signal quality so that the receiving chip is not able to recognize the databit sent by the transmitting device. Some effects are:
Inter Symbol Interference (ISI) Cross Talk Impedance Mismatch between Driver (TX), PCB routing and Receiver Termination (RX) Point to Multi Point Topologies Power/Ground Noise It gets impossible to predict signaling performance just from experience. To ensure a "First Time Right" design, simulations need to be done. And the result, quite often a data eye, needs to be evaluated carefully and a Timing Budget has to be calculated. In case there is enough margin this result can also be used to reduce cost. This can happen in case design guides are too conservative or just do not fit in your environment. However, it is very expensive to invest in software and manpower needed to master the Gigabit Challenge. There is no need for this invest if you have a partner who has the "Eye" KnowHow!
EyeKnowHow provides services for development of PCB Design and Layout. Don't care if DRAM (DDR1, DDR2, DDR3, DDR4, LPDDR), PCIe, SATA, Ethernet, USB, HDMI, DisplayPort (DP), DVI, ... we are in all Specs at home.