Cadence® Allegro® Sigrity™ solutions
As PCB is the integration point to build successful electronic products, Cadence is taking steps toward product creation with its Allegro® PCB and IC packaging design tools, as well as the Sigrity™ SI/PI analysis tools. Cadence will showcase how our Allegro® Sigrity™ solutions for signal integrity and power integrity enable a streamlined, predictable path from implementation to verification.
Improving ECU Signal Integrity
Allegro® Sigrity™ SI provides signal integrity analysis of ECUs with high-speed digital signals. By using electrical constraint sets (ECsets) at the schematic level, you can assign design intent early and ensure that PCBs are routed according to that design intent. Detailed analysis can be performed using the Sigrity Power-Aware SI Option, where signal power and ground are all coupled and simulated together. The extracted model for the ECU can then be cascaded with models of Ethernet cables and other ECUs to ensure full system signal integrity.
• Take advantage of constraint-driven design methodology, which ensures electrical design intent is followed and performance verified with power-aware signal integrity analysis technology
• Reduce your bill of materials (BOM) by modeling the entire Ethernet channel between ECUs without needing actual Ethernet channel hardware components
• Optimize your ECU design with Ethernet channel devices before your design is committed, reducing design spins as well as ECU or new vehicle introduction time