CoSynth’s tools can be licensed for use in the customer’s design center. The tools are prepared for integration into an existing design process, instead of replacing it. Compatibility with tools from e.g. Xilinx, Altera, and Synopsys is provided.
The design process is based on a virtual prototype of the whole system, defined in C++ and SystemC. CoSynth’s own high level synthesis tool automatically generates the necessary VHDL hardware description from the software model, as well as the interfaces between hardware and software. The foundations of the CoSynth methodology have been established in several European research projects. Successful implementations of the flow at industrial partners from automotive and telecommunications industries have shown the applicability.
The main advantages are:
- Concurrent development of hardware and software in a common model
- Integration of software engineering methods for hardware development
- Use of C-based languages (C/C++, SystemC, TLM)
- Automatic generation of hardware/software interfaces
- Automatic synthesis of hardware implementations (high level synthesis)
- Easy integration of legacy IP cores (VHDL and Verilog)
- Fast exploration of hardware/software partitions and communication infrastructure