Konferenzen und Rahmenprogramm
Memory Architecture in Autonomous Vehicles
Memory architecture in autonomous vehicles, both volatile (DRAM) and non-volatile (Flash) memory, is one of the main performance bottlenecks of such embedded systems. This paper describes the key subsystems that demand exceptional performance from memory. AI based sensor fusion for autonomous L5 demands up to 1TB/s of bandwidth from the volatile memory. Sensors and video recording black box, that may help to determine the root cause of an accident and become mandatory in various countries, demands very high endurance from the non-volatile memory. New solutions and memory architectures that enable such performance are discussed in this paper, as well as centralized and distributed system architectures and the associated demands from memory in each case.
--- Datum: 25.02.2020 Uhrzeit: 11:30 - 12:00 Uhr Ort: Conference Counter NCC Ost