Konferenzen und Rahmenprogramm
How to Incorporate Low-resource Cryptography Into a Highly Constrained Real-world Product
The IoT has a problem: the small devices that power the IoT are insecure because these devices have few, if any, options for providing authentication and data integrity. These embedded devices lack the computing, memory, and/or energy resources needed to implement today?s standard security methods. This leaves most IoT systems vulnerable to attack. Before revealing an alternative that enables security on devices as small as the ubiquitous 8051 8-bit microcontroller, we will first show you how to identify security threats and how to determine security requirements. We will provide some techniques for evaluating your products and deployment scenarios for susceptibility to spoofing and impersonation, message tampering, and eavesdropping. We will introduce some effective countermeasures to protect against these threats together with their suggested security strengths. As an example of good security protocol design, we will consider a typical IoT use case where a base station must communicate with a remote sensor in a secure manner. We will discuss some potential exploits and attacks and then outline a security protocol that mitigates those threats. Next, we will introduce Group Theoretic Cryptography (GTC) as an alternative to resource-intensive RSA and ECC. We will explain why RSA, ECC, and Diffie-Hellman are a poor fit for highly-constrained devices such as battery-less sensors with MCUs having low clock rates and low bit-width architectures. We will present a GTC-based suite of quantum-resistant cryptographic methods that have been designed specifically for constrained environments. We will conclude with a discussion on how to incorporate GTC-based security into real-world products. You will learn about the availability of cryptographic libraries that you can incorporate into your own code that implement the low-resource methods discussed in this presentation. Using these libraries, you will see typical run-times plus ROM and RAM utilization for a range of microcontrollers and processor cores.
--- Datum: 01.03.2018 Uhrzeit: 16:00 Uhr - 16:30 Uhr Ort: Conference Counter NCC Ost