Konferenzen und Rahmenprogramm
Algorithm Acceleration with High-Level Synthesis
Abstract: Software is wonderfully flexible. On many of today€™s embedded systems software can be changed at a moment€™s notice and updated to systems world-wide over-the-air. This characteristic makes software the ideal choice for implementing algorithms on so many systems. But software is both slow and inefficient. And there are times when performance and efficiency requirements trump software€™s flexibility and risk mitigation. This session will describe the use of high-level syntheses to €œcompile€ C++ descriptions of algorithms into synthesizable RTL as a way to migrate them from software to hardware, targeting either ASIC or FPGA. We will discuss practical ways of interfacing between the new hardware and software. We will look at the performance of algorithms implemented in hardware as compared to software. And we will explore the differences in both power consumption and energy use in implementations in hardware as compared to software.
--- Datum: 25.02.2020 Uhrzeit: 17:00 - 17:30 Uhr Ort: Conference Counter NCC Ost