Codix Titanium is a powerful 4-slot VLIW processor with a Von-Neumann architecture. It is ideal for applications that require a powerful but compact core and exhibit a high degree of parallelism-image processing, computer vision, and software defined radio, for example.
The Codix Titanium SDK supports multi-issue and is latency aware for both instruction and data access, allowing for highly efficient instruction scheduling.
4 execution units using 5-stage pipelines
Bundle contains 4 instructions of 32bits
32 × 32b general purpose registers
8 × 1b predicate registers
32b status register
2 separate Load/Store Units, ALU and MUL in each slot, 1 Branch Prediction Unit
Single port instruction and dual data port cache
Predicate is computed in 2 slots, but can be used in all of them
Data hazards handled by compiler
Structural and Control hazards handled by hardware
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Codasip is a rapidly growing startup focused on cutting edge embedded processing technology delivered as Codix processor IP cores and EDA tools for designing and optimising embedded processors.
As a founding member of the RISC-V foundation we were the first to make available a commercial RISC-V IP (Codix-Bk) and comprehensive LLVM-based software development environment. RISC-V changes the way embedded systems are designed and implemented. Utilizing an open ISA and separating the ISA specification from the processor micro-architecture and implementation, allows investment in embedded systems to be preserved even when moving between IP vendors. This results in lower risk for customers, and greater innovation in vendors. No longer do you need to rely on closed ecosystems and a single company.
All Codix processor cores are creating using Codasip's unique design automation tools (Codasip Studio). This unique automation technology not only allows Codasip to quickly generate powerful new processor variants (as was the case with the RISC-V based Codix-Bk), but also allow licensees to easily modify their processors to suit their applications. Any change to the processor model is automatically reflected in not only the IP implementation, but in a complete new SDK fully aware of the changes to the IP.
For processor desigers, Codasip Studio accelerates the development of their processor core and accompanying SDK from a single high level description. The toolset allows rapid design space exploration and optimization of a core for its specific application.
Unlike other processor IP companies, we encourage users to change the processor to fit their unique design, in many cases delivering an order of magnitude power/ performance improvement.