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26 - 28 February 2019 // Nuremberg, Germany

Conferences and supporting programme

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Session 10.4: SoC IV ICs & IPs

RADAR Signal Processing on an Embedded System Using the Xilinx Zynq Platform Vortragssprache Englisch

RADAR sensors can serve in applications where a detection of the speed and location of objects is necessary. In this project we have developed a so-called 'sensor backend', which is used to do signal processing on the signals delivered by a 160-GHz RADAR sensor. This backend consists mainly of a Xilinx Zynq Z-7030 FPGA system and additional circuitry to steer the chirp-sequence of the RADAR sensor and a 100 MS/s 14-bit ADC with preamplifier and filter, which is used to convert the analog RADAR signal to the digital domain. The core of the system is a two-dimensional Fast Fourier Transform (FFT). Each ramp of the RADAR chirp-sequence, with 256 ramps in total, is processed by a first 8192-point FFT. The measurement frequency for the chirp-sequences is specified as 10 Hz, which leads to a high performance requirement for the signal processing. Moreover, in order to generate a so-called 'Range-Doppler-Map', we need to process in a second run 4096 FFTs with 256 points over the results of the first FFTs, which leads in effect to a two-dimensional FFT. The two-dimensional FFT is implemented in the FPGA part of the Zynq with two IP cores, attached to the ARM processing system (PS) via an AXI bus system. The Zynq PS is running a full-fledged Linux operating system. It is planned to also implement further signal processing for target detection of the RADAR data also on the Zynq platform, which enables a flexible partitioning in either software or hardware.

--- Date: 28.02.2019 Time: 1:30 PM - 2:00 PM Location: Conference Counter NCC Ost

Speakers

man

Prof. Frank Kesel

Hochschule Pforzheim

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