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25 - 27 February 2020 // Nuremberg, Germany

Conferences and supporting programme

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Session 4.1 I: HW-based Security I

Making Products Safer and More Secure with an MPU Vortragssprache Englisch

A Memory Protection Unit (MPU) is hardware that improves the safety and security of an embedded device by limiting access to memory and peripheral devices to only the code that needs to access those resources. The application can be organized by processes, each having access to its own memory and peripheral space. Not only does the MPU prevent application code from accessing memory or peripheral devices outside its designated area but, it can also be a useful tool to detect stack overflows, one of the most common cause of issues found when using an RTOS. This class will describe what an MPU is and how it can help make embedded systems more robust by preventing tasks from accessing memory or peripheral devices that are managed by other tasks. A Memory Protection Unit (MPU) is available in most Cortex-M microcontrollers yet, are seldom used in embedded applications. I’ll show how an MPU can improve the reliability of an application by putting bounds on memory and peripheral access. The MPU found in most Cortex-M microcontrollers will be used as an example of how an MPU works. I’ll show how to properly use the MPU with an RTOS. Topics that will be discussed are: - Privilege modes - Limiting RTOS APIs for user code - Preventing code from executing out of RAM - Sharing data - Keeping RTOS objects in RTOS space - Handling faults - Creating MPU process tables - And more The class will end with a list of recommendations on the proper use of an MPU in an RTOS environment.

--- Date: 26.02.2019 Time: 11:30 AM - 12:00 PM Location: Conference Counter NCC Ost



Jean Labrosse

Silicon Labs


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