Conferences and supporting programme
How to Secure a RISC-V Embedded System In Just 30 Minutes
Originally developed at UC Berkeley, the free and open RISC-V ISA promises to bring the innovation and collaboration of the open source community to the hardware world. When it comes to security, RISC-V specifications provide many important building blocks. And the highly fragmented RISC-V ecosystem even more. For designers used to traditional closed-source proprietary architectures, the complexity associated with properly implementing these new security technologies may prove daunting. So really the question is: How do I properly secure a RISC-V embedded system? In this class, industry veteran Cesare Garlati - Chief Security Strategist at the non-profit prpl Foundation and long-time member of the RISC-V Security Group, will show exactly that. Specific step-by-step instructions presented in this class - all free / open source on GitHub: - develop a secure embedded application with front-end, Root of Trust and Secure Boot functions - install and configure a multi-domain Trusted Execution Environment - “plug-in” the functions to the Trusted Execution Environment - flash the resulting firmware to an actual FPGA board running a RISC-V Rocket core - run the complete application and demonstration the overall safety and security of the system This class is a must-attend for SoC designers, system architects, and software developers who want to properly implement secure RISC-V systems but don’t want to take the time and the risk of figuring out the necessary moving parts themselves.
--- Date: 27.02.2019 Time: 10:30 AM - 12:00 PM Location: Conference Counter NCC Ost