How to Implement Deep Learning on FPGAs

Deep learning has become a hot topic for numerous application and the embedded market is taking notice. Customers have learned that these networks can be trained to execute and solve a number of problems that were previously not possible. Most of the deep learning solutions today are running on GPUs. For many embedded applications, the power consumption of these implementations is too high. In this presentation we will explain how a deep learning core can be targeted to FPGAs. We will show how both the convolution layers and the fully connected layers can be most effectively implemented. Challenges and tradeoffs for implementations will be explored. In addition, a number of popular frameworks will be benchmarked and compared to other implementations.