Conferences and supporting programme
Extend MCU Security Capabilities Beyond Trusted Execution with Hardware Crypto Acceleration and Asset Protection
This paper discusses NXP’s approach for efficient acceleration of asymmetric cryptography using the ARMv8-M Cortex-M33 coprocessor interface. In addition, this paper will discuss a new CTR encryption based approach for Flash code encryption and 0-latency on the fly decryption that provides a unique asset protection capability without compromising performance. Using a PUF based secret key for Encrypted storage, and PRINCE On-the-fly decryption offers robust protection against SCA, tampering or cloning.
--- Date: 26.02.2019 Time: 12:00 PM - 12:30 PM Location: Conference Counter NCC Ost