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26 - 28 February 2019 // Nuremberg, Germany

Conferences and supporting programme

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Session 35 I - Connectivity V / Wired Connectivity I

Demystifying Time Aware Traffic Shaping Technologies for TSN: A Case Study for Linux Driver Enabling Vortragssprache Englisch

As IEEE802.1 specifications covered under Time Sensitive Network (TSN) matured in recent years, Gigabit Ethernet (GBE) IP with IEEE802.1 Qav, Qbv and Qbu capabilities are expected to be productized as a network card or integrated into SoC. IEEE802.1 Qav defines technology to shape time-sensitive traffic (for audio video streaming) based on credit assigned per queue. As for periodically scheduled traffic, the time latency is expected to be improved by IEEE802.1 Qbv & Qbu through gate control and frame preemption technologies. Intel Ethernet controller i210 series has launch time technology that dictates the time a frame is pre-fetched a head of transmission time from system memory into controller and time the frame is available for transmission scheduling. All of the above-mentioned technologies are used to improve the time latency for both periodically scheduled traffics and time-sensitive traffics with the former having the higher priority. In term of data path, scheduled traffics are assigned highest priority transmit queue (say TxQ-3) whereby the launch time of these frames are set per-packet wise to the time earlier than the time that the gate control (GC-3) opens. This is to make sure such periodic frames are always available at TxQ-3 for scheduling into express MAC (eMAC) controller transmission line when GC-3 opens. It is also at such time interval, other gate controls (say GC-2 for time-sensitive traffic and GC-1 for best-effort traffic) are closed and the preemptable MAC (pMAC) that both GC-2 & GC-1 are connected to enter hold state: all preemptable frames (belong to time-sensitive & best effort traffics) are held-up to allow periodic scheduled traffics to flow through eMAC controller, interspersed within preemptable frames that are in-flight. For time-sensitive traffics, launch time technology is used, then lower priority transmit queue (TxQ-2), followed by credit-based-shaper, gate control (GC-2) and lastly eMAC controller. As for best effort traffics, they flow through lowest priority transmit queue (TxQ-1), gate control (GC-1) and eMAC controller. As TxQ-2 is higher priority than TxQ-1, time-sensitive traffics are rightfully given higher priority than best effort traffics. Intel has submitted patch series to Linux community for the discussion on TSN control path implementation. While we expect software framework for TSN discussion to take a while to settle down, the work for enabling Linux Ethernet driver for future generation of network controller with TSN technologies have started. Since TSN is critical to industrial or automation application, a lot of attention is being paid on how to fine-tune the exact time, relative to master clock across the network, when scheduled traffics are transmitted, i.e. to ensure very small traffic latency. This paper shall share the learning and design consideration in developing Ethernet driver for enabling TSN-related technologies and testing methodologies

--- Date: 01.03.2018 Time: 10:30 AM - 11:00 AM Location: Conference Counter NCC Ost



Boon Leong Ong

Intel Corporation


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