Conferences and supporting programme
Configurable Embedded Boards : when x86 technology meets FPGA technology
Simple x86 or RISC architecture don’t allow enough flexibility nowadays needed to adapt the product to different scenarios. During the presentation, we are going to show the benefit of merging FPGA and x86 technologies in the new AAEON Q7 with Intel Apollo Lake and Intel ® Max ® 10, in UP Squared and in the new UP AI Edge platform. The presentation will be technical.
1. AAEON Q7 (ApolloLake + MAX10 architecture)
2. AAEON UP-squared (ApolloLake + MAX10 architecture)
3. AAEON UP AI Edge (ApolloLake + ADVANCED FPGA architecture)
4. Special topic of interest: UP-squared for RTOS apps. FPGA boosting Apollo Lake ISH RTOS engine; AAEON is the sole to propose such OS + RTOS integrated solution.
5. Special topic of interest: “beyond HAT”; UP-squared FPGA allows to easily enhance HAT port resources; AAEON EXHAT architecture
6. MAX10 target market.
--- Date: 27.02.2018 Time: 3:00 PM - 3:30 PM Location: Exhibitor's Forum hall 3A, Stand 3A-610