+++ The entries in the exhibitor & product database correspond to the registration status for embedded world 2020. +++
Very efficient IP core/framework for the computation of depth images from pairs of stereo images. The IP consists of the following functionality:
RTL code for ASIC/FPGA implementation:
- Image capture
- Color conversion (Bayer->color)
- Image rectification, warping
- Stereo-based computation of depth maps / 3D point clouds
Additionally, we of software components for offline and online calibration of stereo-cameras.