Machine Learning applications in embedded devices are a strongly emerging trend. A large number of AI chips has been announced, the first products for embedded AI are on the market. Current neural network architectures like deep neural networks require high computational complexity and power consumption. Neuromorphic hardware in contrast relies on massive parallel processing and performs calculations, e.g. for Machine Learning, faster and with less power. Efficient architectures for neuromorphic hardware with respect to computational performance, power consumption and chip area are therefore a key element for a widespread deployment of neural networks in embedded devices.
The Fraunhofer IIS presents different neuromorphic hardware architectures. Among them are novel approaches to bring the human neural network closer to the chip.
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