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2 - 4 March 2021 // Nuremberg, Germany

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Exhibitors & Products embedded world 2020
Zoom product LOGO_New and open FPGA/ASIC development workflows

New and open FPGA/ASIC development workflows

LOGO_New and open FPGA/ASIC development workflows

New and open FPGA/ASIC development workflows

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Over the years Antmicro has been at the forefront of the FPGA SoC technology, designing effective high-speed signal platforms for edge computing, especially in computer/machine vision multi-camera applications, which - coupled with our experience in providing end-to-end services of writing FPGA IP, AI/camera processing, BSPs and drivers (Linux, Zephyr) - makes us uniquely positioned to leverage open FPGA development workflows tools and languages such as Chisel and Migen. 

Antmicro’s Zynq Video Board is an example of a smart piece of open hardware for image processing with an open FPGA MIPI CSI-2 IP core for grabbing video streams. Moreover, at the recent RISC-V Summit we unveiled our rapid turnaround chiplet-based ASIC series, GEM. Utilizing zGlue’s smart ASIC SiP development tech, Antmicro engineers are now capable of creating full-blown custom hardware within a practical, quick-prototyping / quick-tape-out process, employing all the benefits of modern open digital design.

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