+++ The entries in the exhibitor & product database correspond to the registration status for embedded world 2020. +++
Device vendors face a flood of Industrial Ethernet protocols and its hard to decide which one is the right to implement. And this decision is hard. Often, there is already an existing porduct and CPU or MCU is used for control tasks where they perfectly fit. But adding communication tasks may cause a complete product redesign cycle.
The port Unififed Data Interface (PUDIN) combines a FPGA and a DPRAM interface to an universal platform for implementing many different Industrial Ethernet and fieldbus protocols. The DPRAM acts as an interface to the application e.g. a host board. Within the DPRAM a common object dictionary is managed as a process image for communication. Whether EtherCAT, POWERLINK oder CANopen: Your application interface stays the same!
A comfortable library eases the access to the object dictionary. Customers of the CANopen libraries can work with the API within a minute. Programming rookies are guided to their first success by different programming examples.
PUDIN uses a very flexible system channel for interchanging information with the application which also supports object creation during runtime. It also offers the possibility to update the firmware of the FPGA. The level of abstraction done by PUDIN can be chosen by the user. If stack specific information such as stack dependent error conditions are needed, PUDIN will provide this information. PUDIN is completed by full support of port’s well
known Design Tools. Using these tools, the application of PUDIN is a breeze: Object dictionary, device description and access function are generated. This results in a fantastic time to market and along the way the error rate of the code is significantly reduced by using the well tested source code genertaed by the tool PUDIN’s features at a glance:
- Universal platform for Industrial Ethernet and fieldbus communications
- FPGA based - ideal solution for small and medium lot sizes
- Supports Altera and Xilinx FPGAs
- Supports EtherCAT, POWERLINK and CANopen. PROFINET support under development. Further protocolls on request.
- Fully supported by port’s design tools