ARIES Embedded GmbH

M100PF - SoM featuring Microsemi PolarFire FPGA

Low Power Mid-Range FPGA for industrial applicartions

The M100PF SoM family spans from 100K logic elements (LEs) to 300K LEs, features 12.7G transceivers and offers up to 50% lower power than competing mid-range FPGAs. The devices are ideal for a wide range of applications within wireline access networks and cellular infrastructure, defense and commercial aviation markets, as well as industrial automation and IoT markets.

PolarFire FPGAs offer various device features such as design security, low power devices and data security. All PolarFire FPGAs are integrated with multi-protocol industry-leading low-power transceivers.

The M100PF combines most FPGA features on a 74mmx42mm footprint, the board-to-board interconnect is implemented by using two high-quality connectors which expose 360pins. The SoM is available in both the commercial temperature range 0°C...+70°C as well as in the industrial temperature range -40°C....+85°C.

The schematics of the M100PF SoM are available von request.

Features M100PF

• PolarFire FPGA
  • MPF100T
    109KLE, 336 Math Blocks (18x18MACC)
  • MPF200T
    192KLE, 588 Math Blocks (18x18MACC)
  • MPF300T
    300KLE, 924 Math Blocks (18x18MACC)
• 512 MiB / 1 GiB / 2 GiB DDR3 RAM
• 128 MiB configuration device
• 4 GiB eMMC memory
• 8 SERDES Lanes, 250Mbps to 12.5Gbps
• 2 PCIe Gen2 End Points/Root Ports
• rich user I/O
• Clock distribution
• single 3,3V supply
• size 74mmx42mm
• 2 x Samtec QSH-090-01-F-D-A board-to-board interconnect
   

RISC-V Softcores

M100PF is supported by  a comprehensive suite of software tool chains and IP cores for your FPGA designs. The Libero SoC and SoftConsole development environments together provide all the required tools to port RISC-V Soft CPUs on Microsemi's FPGA portfolio and develop, test and debug embedded firmware.

Your RISC-V FPGA projects starts in a few minutes

M100PF- versatile usability at its best

M100PF is of course one of the most flexible System on Module in the embedded market. All PolarFire FPGAs are integrated with multi-protocol industry-leading low-power transceivers

High Flexibility

Maximum flexibility for using the SoM  with 'exotic' interface requirements. Combining standard IP cores like i.e. display-controller, Ethernet, CAN, serial, I²C, SPI, etc, unique SoM configurations can be used. Benefit from the variety of freely available IP-cores, or, create your own.

Robust and Reliable

High-quality connector suitable for high frequency signals and applications in harsh environments. Use a well designed System on Module with sufficient ressources in terms of performance, interfaces and memory.
 

M100PFEVP - PolarFire FPGA Evaluation Platform

The M100PFEVP supports a quick start-up of FPGA projects and can easily be used as a fast-prototype platform.

M100PF offers the full flexibility of the PolarFire FPGA family. PolarFire cost-optimized FPGAs deliver the lowest power at mid-range densities with 12.7 Gbps SerDes transceivers as well as best-in-class security and reliability. They offer unprecedented capabilities and value with 10G transceivers, advanced I/Os, security and DSP capabilities while maintaining all the advantages traditionally associated with non-volatile FPGAs such as static power, security and single event upset (SEU) immunity. The devices are ideal for a wide range of applications within wireline access networks and cellular infrastructure, defense and commercial aviation markets, as well as industrial automation and IoT Markets.

Features M100PFEVP

• 2x Gigabit Ethernet
• USB
• 2x UART
• 2x CAN
• TFT connector
• HSMC extension connector
• 3x PMOD extension connectors
• microSD-card slot

PolarFire FPGAs have now been adopted by dozens of customers in key communications, defense and industrial infrastructure market segments. These systems have a substantially lower cost of ownership, as the PolarFire family enables significantly lower power consumption and an ability to operate in harsher thermal environments.

MCVS – Intel PSG Cyclone V SMARC2.0 SoM

CycloneV SoC – Maximum Flexibility on a Standard Form Factor

MCVS offers the full flexibility of the Altera Cyclone V SoC FPGA family.  It integrates an ARM-based hard processor system (HPS) consisting of processor, peripherals, and memory interfaces with the FPGA fabric using a high-bandwidth interconnect backbone. The Altera SoCs combine the performance and power savings of hard intellectual property (IP) with the flexibility of programmable logic.

MCVS features additional hard logic such as PCI Express® Gen1, multiport memory controllers, and high-speed serial transceivers. Our SoCs drive down power and cost while enabling performance levels required by cost-sensitive applications. Due to the flexibility of the MCV concept  25KLE, 40KLE, 85KLE and 110KLE SoC FPGAs are supported by MCVS.

Being compliant to the SMARC2.0 standard defines the key differentiator for MCVS compared to MCV. Main advantages for customers are lower product price as well exchangeability and scalability.

Features

• Altera Cyclone V SoC FPGA
  • without PCIe support
    • A2: 5CSEBA2U23C8N
      25KLE, 36 DSP blocks
    • A4: 5CSEBA4U23C7N
      40KLE, 58 DSP blocks
    • A5: 5CSEBA5U23C7N
      85KLE, 87 DSP blocks
    • A6: 5CSEBA6U23C7N
      110KLE, 112 DSP blocks
  • with PCIe support
    • C2: 5CSXFC2C6U23C7N
      25KLE, 36 DSP blocks, 6 transceivers 2.5Gbit/s
    • C4: 5CSXFC4C6U23C7N
      40KLE, 58 DSP blocks, 6 transceivers 2.5Gbit/s
    • C5: 5CSXFC5C6U23C7N
      85KLE, 87 DSP blocks, 6 transceivers 2.5Gbit/s
    • C6: 5CSXFC6C6U23C7N
      110KLE, 112 DSP blocks, 6 transceivers 2.5Gbit/s
• Dual 800 MHz Cortex A9 Cores
• HPS-Peripherals
• 1 GByte DDR3 RAM
• 256 Mbit configuration device
• 4GByte eMMC memory
• 143 FPGA signals
• 66 HPS signals
• Clock distribution
• default configuration:
  • Gigabit Ethernet
  • UART
  • CAN
  • SPI
  • I²C
  • USB
• SMARC2.0 compliant
   

MCVS- versatile usability at its best

MCVS is of course one of the most flexible System on Module in the embedded market. Thanks to the combination of the Dual Cortex A9 HPS with the FPGA part most application can be addressed with this approach:

MCVS combines FPGA and CPU

MCVS connects the world of FPGA projects with common CPU architecture hardware. A's service is to provide a flawless integration of both areas so that users can focus on the development of application software and/or dedicated FPGA-IP

High Flexibility

Maximum flexibility for using the SoM  with 'exotic' interface requirements. Combining standard IP cores like i.e. display-controller, Ethernet, CAN, serial, I²C, SPI, etc, unique SoM configurations can be used. Benefit from the variety of freely available IP-cores by Altera, or, create your own.

Plug and Play

The SoM supports mainline software for U-Boot and Linux. The BSP covers the entire HPS part of the SoC FPGA. A supplies software development services for drivers, bootloaders and their integration for MCVS.
Your SoC FPGA projects starts in a few minutes.

MCV
New flexibility with Altera Cyclone V

MCV offers the full flexibility of the Altera Cyclone V SoC FPGA family.  It integrates an ARM-based hard processor system (HPS) consisting of processor, peripherals, and memory interfaces with the FPGA fabric using a high-bandwidth interconnect backbone. The Altera SoCs combine the performance and power savings of hard intellectual property (IP) with the flexibility of programmable logic.
MCV features additional hard logic such as PCI Express® Gen1, multiport memory controllers, and high-speed serial transceivers. Our SoCs drive down power and cost while enabling performance levels required by cost-sensitive applications.

Due to the flexibility of the MCV concept  25KLE, 40KLE, 85KLE and 110KLE SoC FPGAs are supported by MCV.

Features

• Altera Cyclone V SoC FPGA
  • without PCIe support
    • A2: 5CSEBA2U23C8N
      25KLE, 36 DSP blocks
    • A4: 5CSEBA4U23C7N
      40KLE, 58 DSP blocks
    • A5: 5CSEBA5U23C7N
      85KLE, 87 DSP blocks
    • A6: 5CSEBA6U23C7N
      110KLE, 112 DSP blocks
  • with PCIe support
    • C2: 5CSXFC2C6U23C7N
      25KLE, 36 DSP blocks, 6 transceivers 2.5Gbit/s
    • C4: 5CSXFC4C6U23C7N
      40KLE, 58 DSP blocks, 6 transceivers 2.5Gbit/s
    • C5: 5CSXFC5C6U23C7N
      85KLE, 87 DSP blocks, 6 transceivers 2.5Gbit/s
    • C6: 5CSXFC6C6U23C7N
      110KLE, 112 DSP blocks, 6 transceivers 2.5Gbit/s
• Dual 800 MHz Cortex A9 Cores
• HPS-Peripherals
• 1 GByte DDR3 RAM
• 256 Mbit configuration device
• 4GByte eMMC memory
• 143 FPGA signals
• 66 HPS signals
• Clock distribution
• default configuration:
  • Gigabit Ethernet 
  • UART
  • CAN
  • SPI
  • I²C
  • USB
• single 3,3V supply
• size 74mmx42mm
• 2 x Samtec QSH-090-01-F-D-A board-to-board interconnect

MCV- versatile usability at its best

MCV is of course one of the most flexible System on Module in the embedded market. Thanks to the combination of the Dual Cortex A9 HPS with the FPGA part most application can be addressed with this approach:

MCV combines FPGA and CPU

MCV connects the world of FPGA projects with common CPU architecture hardware. A's service is to provide a flawless integration of both areas so that users can focus on the development of application software and/or dedicated FPGA-IP

High Flexibility

Maximum flexibility for using the SoM  with 'exotic' interface requirements. Combining standard IP cores like i.e. display-controller, Ethernet, CAN, serial, I²C, SPI, etc, unique SoM configurations can be used.. Benefit from the variety of freely available IP-cores by Altera, or, create your own.

Plug and Play

The SoM supports mainline software for U-Boot and Linux. The BSP covers the entire HPS part of the SoC FPGA. A supplies software development services for drivers, bootloaders and their integration for MCV. 
Your SoC FPGA projects starts in a few minutes

Robust and Reliable

High-quality connector suitable for high frequency signals and applications in harsh environments. Use a well designed System on Module with sufficient ressources in terms of performance, interfaces and memory.

Order codes

MCV-2DB

• 5CSEBA2U23C8N
  • 25 KLEs
  • 36 DSP Blocks
  • 145 FPGA I/O
  • 181 HPS I/O
• Dual CortexA9 SoC FPGA, Altera
• 600MHz speed
• 1GB DDR3 SDRAM
• 4GByte eMMC
• size 74 x 42mm
• 2 x Samtec QSH-090-01-F-D-A board-to-board interconnect
• 0°C...+70°C

MCV-6DB

• 5CSEBA6U23C7N
  • 110 KLEs
  • 112 DSP Blocks
  • 145 FPGA I/O
  • 181 HPS I/O
• Dual CortexA9 SoC FPGA, Altera
• 800MHz speed
• 1GB DDR3 SDRAM
• 4GByte eMMC
• size 74 x 42mm
• 2 x Samtec QSH-090-01-F-D-A board-to-board interconnect
• 0°C...+70°C

MCV-X2DB

• 5CSXFC2C6U23C7N
  • 25 KLEs
  • 36 DSP Blocks
  • 2 x PCIe Hard IP Block, 6 transceiver, 3.125 GBps
  • 145 FPGA I/O
  • 181 HPS I/O
• Dual CortexA9 SoC FPGA, Altera
• 800MHz speed
• 1GB DDR3 SDRAM
• 4GByte eMMC
• size 74 x 42mm
• 2 x Samtec QSH-090-01-F-D-A board-to-board interconnect
• 0°C...+70°C

MCV-X6DB

• 5CSXFC6C6U23C7N
  • 110 KLEs
  • 112 DSP Blocks
  • 2 x PCIe Hard IP Block
    9 transceiver, 3.125 GBps
  • 145 FPGA I/O
  • 181 HPS I/O
• Dual CortexA9 SoC FPGA, Altera
• 800MHz speed
• 1GB DDR3 SDRAM
• 4GByte eMMC
• size 74 x 42mm
• 2 x Samtec QSH-090-01-F-D-A board-to-board interconnect
• 0°C...+70°C

MX10
MAX10 FPGAs for modular applications

MX10  is a non-volatile and fully programmable SoM solution based on the MAX®10 family by Intel PSG. It incorporates advantages of MAX 10 FPGA such as instant-on functionality, integrated analog-to-digital converters (ADCs) and dual configuration flash.
MX10 can be used with the standard baseboard (SpiderBase) as a complete building block or can be plugged into existing designs and products as  functional part. It connects to its baseboard via a 230pins MXM2 connector and provides the ideal solution support for various soft-core CPUs, video-processing algorithms, etc.
The module delivers full-featured FPGA capabilities including support for various soft-core CPUs, advanced DSP and video-processing algorithms as well as external DDR3 controller.

USB Firmware for MX10 and SpiderSoM

MX10 and SpiderSoM modules provide a USB device interface implemented with PIC16F1454 microcontroller (MCU). On the SoM side the MCU is connected to three interfaces: serial (if the other side is implemented inside the FPGA), I2C bus (connected to the module PMIC, charge controller, RTC and FPGA), and FPGA JTAG programming interface.

On the host side Linux is supported as Operating System, currently Ubuntu16.04LTS is marked as a reference base.

Features

• MAX 10 FPGA in F256 package
• module supports wide range of the devices: from 10M04DC to 10M50DA
• optional 4 MByte SPI NOR
• optional 4 GByte e.MMC
• optional 128/256/512MByte DDR3 DRAM (for 10M 16/25/40/50 FPGAs)
• programmable clock generator and PLL, with optional external reference input
• 178 FPGA GPIO pins, including 13 LVDS transmitters and 54 receivers
• RTC with battery backup
• programmable high-efficient PMIC, FPGA IO voltages are configurable
• optional Li-Ion/Li-Pol charger
• Size: 70mm x 35mm

While the SpiderSoM targets the area of IoT Maker applications MX10 was designed to be used in professional electronic designs in commercial applications.

SpiderSom
MAX10 open hardware design

The SpiderSoM is a programmable, non-volatile solution based on Intel® MAX®10 FPGA, which enables it to deliver full-featured FPGA capabilities.

The SpiderSoM can be used with the standard baseboard (SpiderBase) as a complete building block or can be plugged into existing designs and products as  functional part. It connects to its baseboard via a 230pins MXM2 connector and provides the ideal solution support for various soft-core CPUs, video-processing algorithms, etc.

The SpiderSoM is available as a low cost and extremely flexible platform which enables user to setup a running system according to the required specification in a very short time. SoM is based on the free and open design concept: KiCAD design files are available under CERN OHL v1.2.

USB Firmware for MX10 and SpiderSoM

MX10 and SpiderSoM modules provide a USB device interface implemented with PIC16F1454 microcontroller (MCU). On the SoM side the MCU is connected to three interfaces: serial (if the other side is implemented inside the FPGA), I2C bus (connected to the module PMIC, charge controller, RTC and FPGA), and FPGA JTAG programming interface.

On the host side Linux is supported as Operating System, currently Ubuntu16.04LTS is marked as a reference base..

Features

• MAX 10 single voltage supply FPGA in U169 package
• module supports MAX 10 FPGAs from 10M02SC to 10M16SA
• optional 4 MiB SPI NOR
• optional 4 GiB e.MMC
• optional 8 MiB SDRAM
• FPGA GPIO pins
• optional RTC with battery backup
• optional Li-Ion/Li-Pol charger
• Size: 70mm x 35mm

OS Support:

• FreeRTOS^TM

The SpiderSoM promotes the free and open design concept: KiCAD design files are available under CERN OHL v1.2.

While the MX10 SoM targets the area of professional electronic designs in commercial applications the SpiderSoM was designed to be used in IoT Maker applications.

Order codes

SpiderSoM-L

• 10M02SC MAX10 FPGA
• 25MHz clock
• 130 GPIOs, 3,3V I/O voltage

SpiderSoM-S

• 10M08SA MAX10 FPGA
• 1 ADC
• 25MHz clock
• 4MiB SPI NOR
• 130 GPIOs, 3,3V I/O voltage