XynergyBF combines Analog Devices’ Blackfin ADSP-BF537 with a Xilinx Spartan-6 FPGA and a large amount of DDR3 memory for high-performance digital signal processing.
The Blackfin’s external memory interface is directly connected to the FPGA ensuring high-speed data transfers between the two devices.
The Blackfin can be clocked at up to 600 MHz and has 132 KB of on-chip single-cycle SRAM. The 64M x 16 DDR-3 memory, which is connected to the FPGA, can be accessed by the Blackfin page-wise via its memory bus, allowing the Blackfin to use it as external bulk memory.
The Blackfin provides numerous communications interfaces, including 10/100 Ethernet with PHY, USB (via MCP2221A), CAN, a UART (RX/TX only), I²C, and up to 21 general purpose I/O lines.
A 4-channel serial ADC (12 bit, 500 ksps) and a 2-channel 12-bit serial DAC simplify signal acquisition and processing. All interface signals are available at the 200-pin SO-DIMM edge connector.
The FPGA expands I/O capabilities of the XynergyBF by delivering up to 34 differential (LVDS) I/O lines plus two LCDS clocks, useful for connecting FMC compliant expansion boards, and four single-ended general purpose I/O lines.
A break-out board with special function connectors and many pins accessible at 100mil header plus JTAG headers is also available.