The Mercury XU5 SoC module from FPGA specialists Enclustra offers a quick and easy way into the Xilinx Zynq UltraScale+ MPSoC ecosystem. In addition to up to 256,000 systems logic cells across 6 ARM processors, the Mercury XU5 also possesses a GPU and up to 178 user I/Os.
The Mercury XU5 has two memory channels: one is connected to the processing system and supports up to 8 GByte DDR4 ECC SDRAM, the second is connecte to the FPGA matrix and can be equipped with up to 2 GByte DDR4 SDRAM. As a result, the module achieves a memory bandwidth of up to 24 GByte/s.
Both, the processing system and the FPGA matrix, have a Gigabit Ethernet and PCIe Gen2/3 x4 interface. In addition, the 56 x 54 mm small module offers 16 GByte eMMC and 64 MB QSPI Flash as well as USB 3.0. and only a single supply voltage between 5 and 15 volts is required for operation.
The module is available in both industrial and extended temperature ranges, needs just a single 5-15 V supply for operation and has a planned availability of 10 years.
Reference design and Linux at the push of a button
Enclustra offers a broad design-in support for their products. With the Mercury+ PE1-200, the Mercury XU5 can be a powerful development and prototyping platform.
Further expansion options are provided by the FMC LPC connector on the PE1 base board, compatible with a huge range of plug-in cards from various manufacturers - ADCs, DACs, motor control cards and RF links are just a small selection of possibilities.
Enclustra also offers a comprehensive ecosystem for the XU5, offering all required hardware, software and support materials. Detailed documentation and reference designs make it easy to get started, in addition to the user manual, schema, a 3D-model, PCB footprint and differential I/O length tables.
The Enclustra Build Environment can be used to compile the Enclustra SoC modules with an integrated ARM processor very smoothly. The module and base board are selected by a graphical interface. After that, Enclustra Build Environment downloads the appropriate Bitstream, First Stage Boot Loader (FSBL) and the required source code. Finally, U-Boot, Linux and the root file system based on BusyBox are compiled.
Thanks to the family concept with compatible connectors, different types of modules can be used on the same base board. If for example, an ARM processor is not required, the Mercury+ KX2 FPGA module can be used on the same baseboard instead.
- Xilinx Zynq Ultrascale+ MPSoC
- ARM quad-core Cortex-A53
- ARM dual-core Cortex-R5
- Mali-400MP2 GPU
- H.264 / H.265 Video Codec
- 16nm FinFET+ FPGA fabric
- Up to 8 GB DDR4 ECC SDRAM (PS)
- Up to 2 GB DDR4 SDRAM (PL)
- 64 MB QSPI flash
- 16 GB eMMC flash
- PCIe Gen3 x4 and PCIe Gen2 x4 endpoints
- Up to 8 x 6/12.5 Gbit/sec MGT
- 2 x Gigabit Ethernet
- 2 x USB 3.0
- 2 x USB 2.0 (host & host/device)
- Up to 256,000 LUT4-eq
- 178 user I/Os
- 14 ARM peripherals
- 144 FPGA I/Os
- 20 MGT signals
- 14 ARM peripherals
- 124 FPGA I/Os
- 40 MGT signals
- 5 to 15 V single supply
- Small form factor (56 x 54 mm)