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26 - 28 February 2019 // Nuremberg, Germany

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Exhibitors & Products embedded world 2018
Zoom product LOGO_FR-LVDS8-V Breakout board

FR-LVDS8-V Breakout board

LOGO_FR-LVDS8-V Breakout board

FR-LVDS8-V Breakout board

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An error has occurred.

*Converting input signals to TMDS withnon-sync regulation.

*VESA data format. (T3M&P for higher bit transmission)

*LVDS data latchatfalling edgeoftransmit clock frequency of max.85MHz.

*No EDID supported     

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FR-LVDS8-V Breakout board is assigned to following product groups:

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