14 - 16 March 2017 // Nuremberg, Germany

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Zoom product LOGO_SLX PARALLELIZER

SLX PARALLELIZER

LOGO_SLX PARALLELIZER

SLX PARALLELIZER

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SLX Parallelizer receives sequential C code as input and semi-automatically turns it into a parallel process network implementation. Internally, it uses static and dynamic code analysis techniques to detect parallelism patterns that are guaranteed to deliver performance improvements in multicores. Example of these patterns areTask-Level Parallelism (TLP), Data-Level Parallelism (DLP) and Pipeline-Level Parallelism (PLP). This structured parallelism is commonly present in multimedia and signal processing applications but is mostly hidden within the sequential implementation. SLX Parallelizer interacts with the programmer to expose this parallelism and performs whole-program analysis and optimizations to decide on the best parallel representation of the application for a given target multicore. The parallelized version can be exported as C code with standard parallel APIs, such as pthreads or MPI, or can be forwarded as a CPN process network into the SLX Mapper for further optimizations and refinement.

SLX EXPLORER

LOGO_SLX EXPLORER

SLX GENERATOR

LOGO_SLX GENERATOR

SLX MAPPER

LOGO_SLX MAPPER

SLX Tools for OEM Products

LOGO_SLX Tools for OEM Products

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