Konferenzen und Rahmenprogramm
Optimally Balancing Simulation, Emulation and Prototyping for System on Chip Development
System on Chip (SoC) development teams today can choose for their hardware/software projects from three key dynamic verification engines for pre-silicon verification and early software development€“ simulation (at the transaction- and signal-level), emulation and FPGA based prototyping. Each of the engines provides different performance, fidelity and debug flexibility that needs to be considered carefully in the context of design bring-up and engine cost. Using examples from recent customer case studies, as well as comparing user requirements, this presentation will analyze the different options that development teams have to balance the usage of dynamic engines. We will illustrate how such balancing results in the optimization of verification throughput and enables software development at the earliest possible time during a project. We will extend the analysis to show how to combine different levels of abstraction in simulation and emulation for even further optimization.
--- Datum: 25.02.2020 Uhrzeit: 16:30 - 17:00 Uhr Ort: Conference Counter NCC Ost