Konferenzen und Rahmenprogramm
On-Chip Debug and Test Infrastructures of Embedded Systems from the Users Perspective
In the world of embedded systems developers are facing widely different challenges when it comes to debugging and test of software. On one hand, we see the need for cost-efficient standard components fulfilling the requirement of minimal integration effort. As experience has shown for such systems the investment for debug infrastructure is not very high. That reflects in the number of pins available for debug signals as well as in the actual functional range of debug functions of the chip. On the other hand, we will find extremely powerful multicore systems used in automotive and industrial applications. On the part of software developers the requirements on debugging and system observability is much higher which of course affects the available interfaces, and not least, the on-chip debug and trace functions. The paper will give a brief overview of present common debug interfaces of embedded systems. That includes dedicated physical interfaces as well as abstract debug protocols using functional ports. Particular attention is paid on performance, speed and fault tolerance but also on what effort is needed for system integration of these interfaces. Of course for debugging and test not only the debug interfaces are of interest. They are in fact only a means to an end. For end users it is rather essential which possibilities of system observation they can expect from the debug tool on their PC. That depends significantly on the debug hardware of the particular controller. In the last years, a number of quasi-standards emerged in that area which are, however, mostly vendor specific. In the paper the most important ones will be examined more closely, common features and differences will be elaborated, and primarily we will have a look at the features and functions from the user’s point of view. Multicore systems are most challenging for debugging at the moment. The user expects, for example, that he can halt and start again several cores synchronously. It takes some effort in the on-chip hardware in order to fulfill that requirement. The semiconductor vendors offer different solutions which are introduced in the paper. Besides traditional debug functions used for run-mode debugging, trace based debugging, non-invasive system observation and trace based analysis of the system’s run-time behavior play a key role nowadays. For this purpose specific trace modules have to be integrated into the controller and, furthermore, dedicated interfaces have to be provided to the outside. That might be possibly quite expensive and costs and benefits have to be considered surely. Finally the paper will give an overview of available implementations and elaborate common features and differences.
--- Datum: 01.03.2018 Uhrzeit: 15:30 Uhr - 16:00 Uhr Ort: Conference Counter NCC Ost