Konferenzen und Rahmenprogramm
Framework to Port Neural Networks to FPGA, Suitable for Realtime Signal Processing
Due to their hardware architectures, FPGAs are optimally suited for the implementation of machine learning algorithms, but so far there are no suitable tools, which could make the implementation in the FPGA easy. A frequently used solution to this problem is the implementation of machine learning algorithms with Open Compute Language (OpenCL). While OpenCL supports the development of machine learning algorithms, it also adds unnecessary overhead to the FPGA netlist, limiting the performance of the FPGA. The Institute for Embedded Systems developed a framework for the development of fully interconnected dense layers and 1D and 2D-convolutional layers. Networks defined in Tensor Flow or Keras are transferred to the framework. The implementation is done directly in VHDL and is optimized for synthesis into an FPGA. This enables nonlinear signal processing with neural networks in real-time directly on the FPGA without the use of an embedded CPU.
--- Datum: 26.02.2020 Uhrzeit: 11:30 - 12:00 Uhr Ort: Conference Counter NCC Ost