The Anvo-Systems Dresden ANV32AA3P is a 1Mb Quad SPI SRAM with a non-volatile SONOS storage element included with each memory cell, organized as 128k words of 8 bits each. The devices are accessed by a high speed Quad SPI-compatible bus. There are with SPI, DPI and QPI different SPI options available. In single SPI mode the addresses can be clocked in additional dual or quad and data can be read out also in dual or quad mode. The ANV32AA3P is enabled through the Chip Enable pin (E), accessed via serial clock (CLK) and 3 operation codes either with single serial data input (SI) and single serial data output (SO) or dual by 2 bidirectional input / outputs (I/O0 and I/O1) or quad by 4 bidirectional inputs / outputs (I/O0, IO/O1, I/O2, I/O3).
The Quad SRAM provides the fast access & cycle times, ease of use and unlimited read & write endur- ance of a standard SRAM. Dedicated safety features supporting high data accuracy.
With Secure WRITE operation the ANV32AA3P accepts address and data only when the correct 2 Byte CRC, generated from the complete 3 address Bytes and 128 Byte data, has been transmitted. Corrupt data cannot overwrite existing memory content and even valid data would not overwrite on a corrupted address. With configuration register bit 4 the success of the Secure WRITE operation can be monitored. In case of corrupt data bit 4 will be set volatile to high.
With Secure READ operation the ANV32AA3P calcu- lates the correct 2 Byte CRC parallel to data transfer. The 2 Byte CRC is transmitted after 128 Bytes of data have been read out.
Data transfers automatically to the non-volatile storage cells when power loss is detected or in any brown out situation (the PowerStore operation). On power up, data are automatically restored to the SRAM (the Power Up Recall operation). The PowerStore operation can be disabled via Configuration Register settings.
With Read Last Successful Written Address it is possi- ble, after Power Up Recall, to read out the address where data were last written successfully, before a PowerStore.
Both STORE and RECALL operations are also avail- able under instruction control, Store can also be hard- ware controlled via HSB pin.
BLOCK WRITE Protection is enabled by programming the status register with 1 of 14 options to protect blocks.
A non-volatile register supports the option of a 8 Byte user defined serial number. This register is under customer control only.